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#pragma once
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#include "module.h"
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#include "GlobalDefine.h"
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#include "Subject.h"
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#include "PciPort.h"
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#include "EnumPropertieType.h"
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#if 1//<2F>˿ڿ<CBBF><DABF>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD>
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#define PCI_PORT_NULL _T("NULL")
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//<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
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#define PCI_PORT_PLUS_X _T("X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>")//X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define PCI_PORT_DIR_X _T("X <20>᷽<EFBFBD><E1B7BD>")//X <20>᷽<EFBFBD><E1B7BD>
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#define PCI_PORT_DIR_Y _T("Y <20>᷽<EFBFBD><E1B7BD>")//Y <20>᷽<EFBFBD><E1B7BD>
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#define PCI_PORT_PLUS_Y _T("Y <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>")//Y <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define PCI_PORT_DIR_Z _T("Z <20>᷽<EFBFBD><E1B7BD>")//Y <20>᷽<EFBFBD><E1B7BD>
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#define PCI_PORT_PLUS_Z _T("Z <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>")//Y <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define PCI_PORT_LASER _T("<22><><EFBFBD><EFBFBD>")
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#define PCI_PORT_LASER_2 _T("<22><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>")
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#define PCI_PORT_EXHAUST_FAN _T("<22><><EFBFBD><EFBFBD>")
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#define PCI_PORT_LIGHT_R _T("<22><><EFBFBD><EFBFBD>")
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#define PCI_PORT_LIGHT_Y _T("<22>Ƶ<EFBFBD>")
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#define PCI_PORT_LIGHT_G _T("<22>̵<EFBFBD>")
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#define PCI_PORT_ALARM _T("<22><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>")
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#define PCI_PORT_AIR _T("<22><><EFBFBD><EFBFBD>")
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#define PCI_PORT_VACUUM_OUT1 _T("<22><><EFBFBD><EFBFBD>OUT1") //<2F><><EFBFBD>տ<EFBFBD><D5BF><EFBFBD>
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#define PCI_PORT_VACUUM_OUT2 _T("<22><><EFBFBD><EFBFBD>OUT2")
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#define PCI_PORT_DOOR _T("<22><>")
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#define PCI_PORT_PLC_1 _T("PLCͨ<43><CDA8>λ1")
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#define PCI_PORT_PLC_2 _T("PLCͨ<43><CDA8>λ2")
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#define PCI_PORT_PLC_3 _T("PLCͨ<43><CDA8>λ3")
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#define PCI_PORT_PLC_4 _T("PLCͨ<43><CDA8>λ4")
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#define PCI_PORT_PLC_5 _T("PLCͨ<43><CDA8>λ5")
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#define PCI_PORT_PLC_6 _T("PLCͨ<43><CDA8>λ6")
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//<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>----------------------------------------------
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#define PCI_PORT_LIMIT_SWITCH_X_F _T("X <20><><EFBFBD><EFBFBD>λ")
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#define PCI_PORT_LIMIT_SWITCH_X_N _T("X <20><><EFBFBD><EFBFBD>λ")
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#define PCI_PORT_LIMIT_SWITCH_Y_F _T("Y <20><><EFBFBD><EFBFBD>λ")
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#define PCI_PORT_LIMIT_SWITCH_Y_N _T("Y <20><><EFBFBD><EFBFBD>λ")
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#define PCI_PORT_LIMIT_SWITCH_Z_F _T("Z <20><><EFBFBD><EFBFBD>λ")
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#define PCI_PORT_LIMIT_SWITCH_Z_N _T("Z <20><><EFBFBD><EFBFBD>λ")
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#define PCI_PORT_VACUUM_IN1 _T("<22><><EFBFBD><EFBFBD>IN1")
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#define PCI_PORT_VACUUM_IN2 _T("<22><><EFBFBD><EFBFBD>IN2")
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#define PCI_PORT_FIBER1 _T("<22><><EFBFBD><EFBFBD>IN1")
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#define PCI_PORT_FIBER2 _T("<22><><EFBFBD><EFBFBD>IN2")
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#define PCI_PORT_AIR_CYLINDER_1 _T("<22><><EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD>λ")
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#define PCI_PORT_AIR_CYLINDER_2 _T("<22><><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD>λ")
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#define PCI_PORT_DOOR_CHECK _T("<22>Ž<EFBFBD>")
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#define PCI_PORT_GRATING _T("<22><>դ")
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#define PCI_PORT_STOP _T("ֹͣ")
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#endif
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//<2F>̳<EFBFBD>CModule <20><>Ϊ<EFBFBD>˻<EFBFBD><CBBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ洢<D4B4>Ĺ<EFBFBD><C4B9><EFBFBD>
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//<2F>̳<EFBFBD>CSubject <20>dz<EFBFBD>Ϊ<EFBFBD>۲<EFBFBD><DBB2><EFBFBD>ģʽ<C4A3><CABD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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class CPciPortMgr :public CModule,public CSubject
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{
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public:
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CPciPortMgr(void);
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~CPciPortMgr(void);
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virtual void Ini();
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virtual CMFCPropertyGridProperty *CreatGridProperty();
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virtual void ExportPar(ofstream *pFile);
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virtual MODULE GetModuleType(){return _PCI_PORT_PROP;};
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virtual void OnPropertyChanged();
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SPciPort GetCtrlPort(CString);
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int GetOutPortDefaultStateL(){return m_OutPortDefaultStateL;};
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int GetOutPortDefaultStateH(){return m_OutPortDefaultStateH;};
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private:
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void InsertOutCtrlType(CMFCPropertyGridProperty* p);
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void InsertInCtrlType(CMFCPropertyGridProperty* p);
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void IniPciPortVec();
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void IniPortCtrlType();
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void IniObserver();
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private:
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int m_PciPortCnt;//<2F>˿ڵĸ<DAB5><C4B8><EFBFBD>
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vector<CString> m_OutPortCtrlType;//out <20>˿ڿ<CBBF><DABF>Կ<EFBFBD><D4BF>Ƶ<EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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vector<CString> m_InPortCtrlType;//in <20>˿ڿ<CBBF><DABF>Կ<EFBFBD><D4BF>Ƶ<EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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vector<pair<CString,bool>> m_PciPortVec;//<2F>洢pci <20><>ÿ<EFBFBD><C3BF><EFBFBD>ڿ<EFBFBD><DABF>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD><EFBFBD>PCI_PORT_NULL Ϊʲô<CAB2><C3B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(bool <20><>ʾ<EFBFBD>˿<EFBFBD><CBBF>Ƿ<EFBFBD><C7B7><EFBFBD>ת)
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int m_OutPortDefaultStateL;//<2F><><EFBFBD><EFBFBD><EFBFBD>˿ڵͰ<DAB5>λ<EFBFBD><CEBB>Ĭ<EFBFBD><C4AC>״̬
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int m_OutPortDefaultStateH;//<2F><><EFBFBD><EFBFBD><EFBFBD>˿ڸ߰<DAB8>λ<EFBFBD><CEBB>Ĭ<EFBFBD><C4AC>״̬
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};
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extern CPciPortMgr *gPciPortMgr;
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